CML based DFF combined with NAND function used in 4/5 prescaler block | Download Scientific Diagram
DFF-based CMOS clock divider. | Download Scientific Diagram
Low Power Rail to Rail D Flip-Flop Using Current Mode Logic Structure
KR100969864B1 - Cml type d flip-flop and frequency divide-by-odd number using the same - Google Patents
MIPI homepage CMOS prescaler basics
Electronics | Free Full-Text | A Power Efficient Frequency Divider With 55 GHz Self-Oscillating Frequency in SiGe BiCMOS
Schematic of standard CML master-slave D-flip flop. | Download Scientific Diagram
Circuit configuration of the proposed NDR-based CML D flip-flop | Download Scientific Diagram
Current Mode Logic Divider
Electronics | Free Full-Text | A Power Efficient Frequency Divider With 55 GHz Self-Oscillating Frequency in SiGe BiCMOS
A Novel Ultra High-Speed Flip-Flop-Based Frequency Divider: Ravindran Mohanavelu and Payam Heydari | PDF
Circuit configuration of the RTD/HBT MOBILE-based NRZ D-flip flop. | Download Scientific Diagram
An active inductor employed CML latch for high speed integrated circuits | SpringerLink
Figure 1 from Design of low-power high-speed dual-modulus frequency divider with improved MOS current mode logic | Semantic Scholar
ECEN620: Network Theory Broadband Circuit Design Fall 2022
High speed CML latch using active inductor in 0.18μm CMOS technology | Semantic Scholar
Performance evaluation of the low-voltage CML D-latch topology - ScienceDirect
High Speed Digital Blocks
Figure 4 from Low power inductor-less CML latch and frequency divider for full-rate 20 Gbps in 28-nm CMOS | Semantic Scholar
An improved current mode logic latch for high‐speed applications
Figure 16.23 from Direct-coupled Fet Logic (dcfl) @bullet Source-coupled Fet Logic (scfl) @bullet Advanced Mesfet/hemt Design Examples Iii-v Hbt for Circuit Designers @bullet Current-mode Logic @bullet Emitter-coupled Logic @bullet Ecl/cml Logic Examples @
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PDF] New CML latch structure for high speed prescaler design | Semantic Scholar
Electronics | Free Full-Text | 40 GHz VCO and Frequency Divider in 28 nm FD-SOI CMOS Technology for Automotive Radar Sensors
4-bit Counter Using High-Speed Low-Voltage CML D-Flipflops | Semantic Scholar
CML based DFF used in 4/5 prescaler block | Download Scientific Diagram
